The TFA9882 is a mono, filter-free Class-D audio amplifier. It receives audio and control settings via an I2S digital interface. The Power-down to operating mode transition is triggered when a clock signal is detected on the bit clock input (BCK). Two devices can be combined to build a stereo application.
In stereo applications, the left or right I2S audio stream is selected by connecting the word select signal to, respectively, pin WSL or pin WSR. Mono mixing can be achieved by connecting the word select signal to both WSL and WSR. Switching off the word select signal takes it to the mute mode.
The device features low RF susceptibility because it has a digital input interface that is insensitive to clock jitter. The second order closed loop architecture used in the TFA9882 provides excellent audio performance and high supply voltage ripple rejection.
Small outline WLCSP9 package: 1.27 * 1.49 * 0.6 mm
Wide supply voltage range (fully operational from 2.5 V to 5.5 V)
High efficiency (90 %, 4 ? / 20 μH load) and low power dissipation
6.5 mW (VDDD = 1.8 V, VDDP = 3.6 V, 4 ? / 20 μH load, fs= 32 kHz)
7.65 mW (VDDD = 1.8 V, VDDP = 3.6 V, 4 ? / 20 μH load, fs = 48 kHz)
1.4 W into 4 ? at 3.6 V supply (THD = 1 %)
2.7 W into 4 ? at 5.0 V supply (THD = 1 %)
3.4 W into 4 ? at 5.0 V supply (THD = 10 %)
Output noise voltage: 24 μV (A-weighted)
Signal-to-noise ratio: 103 dB (VDDP = 5 V, A-weighted)
Fully short-circuit proof across load as well as on supply lines
Current limiting to avoid audio holes
Protection from low voltage and high voltage
High-pass filter for DC blocking
Simplified interface for audio and control settings
Left/right selection and mono mixing
Three gain settings: -3 dB, 0 dB and +3 dB
Output slope setting for EMI reduction
Clip control for smooth clipping
Low RF susceptibility
Insensitive to input clock jitter
‘Pop noise’ free at all mode transitions
Short power-up time: 4 ms
Short power-down time: 5 μs
1.8 V / 3.3 V tolerant digital inputs
Only two external components required
9-bump WLCSP (Wafer Level Chip-Size Package) with a 400 μm pitch
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